Typically a vertical transistor device comprises a source, a gate and a drain vertically stacked on a surface of a substrate, wherein the gate is disposed between the source and the drain, so as to form a channel perpendicular to the surface of the substrate. Since the channel length is defined by the thickness of the gate that is deposited on a vertical sidewall of the substrate, thus the lateral size of a transistor element can be significantly decreased and the integrated density of a semiconductor circuit applying the vertical transistor device can be increased.
As each technology nodes shrink, the dimensions of the vertical transistor device and the thickness of its gate, however, must be reduced and short channel effect more likely triggered by the reduced gate thickness.
Therefore, there is a need of providing an improved vertical transistor device and the method for fabricating the same to obviate the drawbacks encountered from the prior art.